ReverseEdgesStage selectively reverses edges in a graph, while keeping the layout and label positions of the reversed edges as close to the pre-reversal layout and positions as possible.
Remarks
- port candidates (see sourcePortCandidates and targetPortCandidates)
- port group IDs (see sourcePortGroupIds and targetPortGroupIds)
- port alignment IDs (see sourcePortAlignmentIds and targetPortAlignmentIds)
- edge group IDs (see sourceGroupIds and targetGroupIds)
Type Details
- yFiles module
- algorithms
Constructors
Creates a new ReverseEdgesStage instance with an optional coreLayout.
Parameters
A map of options to pass to the method.
- coreLayout - ILayoutAlgorithm
- The core layout algorithm.
- enabled - boolean
See Also
Properties
Gets or sets the core ILayoutAlgorithm that is wrapped by this stage.
Gets or sets a value that determines whether this stage should do anything but execute the coreLayout.
Remarks
By default, when constructed, stages should be enabled. Users may disable a stage's functionality by setting this property to false.
Stages that can guarantee that the graph will not change can choose to not even execute the coreLayout when disabled.
Implements
Methods
Implementation of the ILayoutAlgorithm interface and main entry point for the layout calculation.
Remarks
Parameters
A map of options to pass to the method.
- graph - LayoutGraph
- The graph to apply the layout to.
Implements
Reverses all selected edges before calling the coreLayout and restores the original edge direction after the core layout algorithm has finished.
Parameters
A map of options to pass to the method.
- graph - LayoutGraph
- the input graph
Implements
Constants
A data key for selecting edges for reversal.
Remarks
true to an edge if the edge should be reversed, or false otherwise.